Know More About IA-64: Architectural Details Released by HP and Intel
HP and Intel officially released the long-awaited nitty-gritty details for the IA-64 architecture today. Calling it the "most significant microprocessor architecture advancement since the Intel 80386," the announcement marked the public release of the IA-64 instruction set(know as EPIC) in development by HP and Intel since 1994.
Ronald E. Curry, director of marekting for Intel's IA-64 processor division and Jim Carlson, director of worldwide IA-64 systems marketing were both on hand at a press briefing discussing the complete details on programming model, registers and application architecture. Intel's forthcoming Merced CPU is the first application of the Explicitly Parllel Instruction Set Computing (or EPIC) architecture.
For HP-UX users, Carlson stated that there is a one-to-one mapping of PA-RISC executable to IA-64. HP's "dynamic translation," part of HP-UX, will be transparently and automatically invoked to run native PA-RISC code. And the new 64-bit architecture will provide backward compatibility with existing 32-bit (or IA-32-based) applications. For more information, Application Instruction Set Architecture Guides (AIGs) can be found at:
www.hp.com/go/ia64 or
developer.intel.com/design/ia64/index.htm.