HP Reveals Details on PA-8700 Chip

HP has revealed details of its 64-bit PA-8700 processor, designed for servers and workstations. The PA-8700, released to manufacturing in late March, is scheduled to ship in the first half of 2001. The chip, which will work with UNIX, Linux, and the upcoming 64-bit version of Windows, will run at frequencies of 800 MHz and above.

The PA-8700 employs a .18 micron, silicon-on-insulator copper CMOS process. That process allows for 2.25 MB of on-chip cache (the largest of any microprocessor) and a 50 percent increase over the PA-8600. HP says that the new .18 micron process reduces voltage, which significantly lowers power consumption when the chip operates at higher frequencies, and results in cooler operation. The process also enables the PA-8700 to calculate up to 3.2 billion operations per second.

HP is targeting the PA-8700 against Sun's UltraSPARC III. The PA-8700's integer and floating point performance, HP claims, will be at least 64 percent and 14 percent better, respectively, than that for the Sun chip.

The introduction of the PA-8700 builds on HP's strategy of providing its customers with a smooth transition to the new IA-64 processors based on EPIC architecture. HP has promised it will continue to deliver performance boosts by releasing chips based on PA-RISC as it prepares customers for the move to EPIC. At this point, HP plans to introduce two new chips in the PA-RISC line—the PA-8800, probably sometime in 2002—and the PA-8900, scheduled for delivery well beyond that.

This means the company intends to maintain parallel product lines—PA-RISC and IA-64—well beyond 2002. By the time HP introduces the PA-8800, Intel will have followed up the first of the IA-64 chips, the Itanium, with McKinley. By the time the PA-8900 is introduced, the third of the IA-64 chips (Deerfield) will have been introduced. The parallel strategy will allows customers to delay moving to the EPIC architecture, if they have no need to do so.

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