IBM Announces Power5 for pSeries

Power5 and new AIX 5.3 bring multi-threading, enhanced virtualization to pSeries

IBM Corp. today announced new pSeries systems based on its Power5 microprocessor, as well as a new version of its Unix operating system, AIX 5.3.

Big Blue officially unveiled Power5 several months ago, introducing the new processor in its i5 (nee iSeries) systems. Like its predecessor (Power4), Power5 is a multi-core chip with two physical cores, but unlike Power4, Power5 also boasts two virtual cores that are enabled by virtue of its Simultaneous Multithreading Technology (SMT).

Karl Freund, vice-president of pSeries products for IBM’s Systems and Technology Group, says that Power5 offers a substantial performance boost over Power4, which many industry watchers say is the fastest RISC microprocessor on the market. “[Power5’s] performance even in the context of what we’ve done with Power4 is really significant. Our 16-way servers are outperforming 32- and 64-way servers from our competition,” Freund says.

IBM doesn’t expect to start shipping Power5-based pSeries systems until August 31, at which time it will offer Power5 in two-, four-, eight-, and 16-way complements. Big Blue plans 32-way and 64-way systems “at a later date,” says Freund, who declines to speculate about whether these systems will appear before the end of the year.

IBM’s Unix fortunes have changed drastically since 2001, such that over the last 18 months, especially, one-time Unix market also-ran Big Blue has been locked in a back-and-forth battle with Hewlett-Packard Co. for Unix market bragging rights. One reason for IBM’s success has been its aggressive pricing vis-à-vis both HP and Sun Microsystems Inc. Freund says that Big Blue plans to stay just as competitive with Power5.

“On the eight-way version of the product, called the p570 express, that is priced pretty much right on top of a [Sun] v880, and will deliver three or four times the performance of the v880,” Freund maintains, citing SAP benchmark results that back up this claim. “For an SAP implementation, for 5,000 SAP users, if you take a look at the Sun server, it takes 72 processors with UltraSPARC IV on an e20K to support 5,000 users. That same 5,000 users can be supported on our benchmark with a 16-way p570, and the price delta on that is 73 percent less.”

Part of the reason for the Power5’s enhanced performance is its new SMT technology, which enhances the performance of multithreaded applications. Freund says that applications do not have to be rewritten to exploit SMT, either. “The performance is really delivered by an enhanced memory subsystem, and by SMT, so this will be the first simultaneous multithreading chip on the market,” he claims. “As long as it’s already written as a multithreaded application, such as databases or other transaction-intensive processes, it will automatically deploy those threads on the multithreaded chips.”

For the record, Intel delivered a multi-threading technology (called HyperThreading) two years ago. Sun Microsystems, for its part, has committed to an aggressive multi-core, multi-threading strategy that, in the form of its forthcoming Niagara chip, will boast eight processor cores with four threads each, for a total of 32 virtual processors.

Freund says that Power5 is a pragmatic approach to multi-core and multi-threading features. “There are limits to both multi-core and multi-threading, so if you have too many cores or too many threads, you will place demands on your cache that will degrade performance,” he comments. “If I put too many cores on the cache, you’re constantly flushing the cache, so we feel that … today’s balance point is really what we have.”

Nathan Brookwood, a principal with microprocessor researcher Insight64, says that there are, indeed, challenges associated with Sun’s aggressive multi-core/multi-threading strategy. Nevertheless, he argues, the risk is worth the reward to Sun. “Until Sun pulls it off and demonstrates that this really makes sense, there’s probably going to be a lot of skepticism, yes,” he confirms. “But if it works, it’s going to be a very impressive chip.”

New Virtualization Engine is Key

In addition to its SMT features, Power5 also has a plum role to play in IBM’s Virtualization Engine technology, which virtualizes processor, memory, LAN, and disk (SCSI) resources. Virtualization Engine, which Big Blue currently supports in both the i5 and AIX 5.3 operating environment, is based on technology that IBM originally developed for zSeries.

According to Freund, Virtualization Engine allows customers to more efficiently partition their Power5-based systems, such that they can create sub-processor logical partitions (LPAR) with up to 10 LPARs per processor. This lets organizations wring maximum performance out of their Unix servers, he says. “Typically, Unix servers are 15 percent used at best, and this is going to allow that utilization rate to skyrocket,” he argues. “You can have as little as 1/10 of a processor assigned to a partition, so for very small workloads (or for workloads that perhaps for a period of time should be very small) you can put very small amounts of memory, I/O, and processor to that partition.”

For the time being, says Jonathan Eunice, an analyst with consultancy Illuminata, Big Blue’s Virtualization Engine will probably only appeal to its biggest customers. Over time, says Eunice, that will change. “The larger and more complex a customer, the larger and more complex their infrastructure is likely to be, and so the more likely they are to get immediate value from this kind of simplification and unification approach,” he concludes.

About the Author

Stephen Swoyer is a Nashville, TN-based freelance journalist who writes about technology.